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////  CFIOWrite.v                                                 ////
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//// Copyright (C) 2005, Picocomputing, Inc.                      ////
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////////////////////////////////////////////////////////////////////JF

//This module handles IO Write decoding and timing

`timescale 10ns / 1ns

module CFIOWrite(CFClock, CardEnabled, OE, WE, IORD, IOWR, REG,
                IOWriteLatch, IOWrite);

input CFClock;                                                       //200 MHz Clock
input CardEnabled;                                                   //Master Card Enable
input OE;                                                            //Memory Read
input WE;                                                            //Memory Write
input IORD;                                                          //I/O Read
input IOWR;                                                          //I/O Write
input REG;                                                           //Attribute Memory Access

output IOWrite;                                                      //Delayed Common Memory Write
output IOWriteLatch;                                                 //Memory Write Hold (Until Card Disconnect)

wire RawIOWrite;
wire IOWriteLatchRising;

assign RawIOWrite = (CardEnabled) && (OE) && (WE) && (~REG) && (IORD) && (~IOWR);

                                                                     //During Memory Writes the Databus can Take up to 35nS to Setup
LongDelay IOWriteLongDelay(CFClock, RawIOWrite, IOWriteLatchRising);
Delay IOWriteDelay(.Clock(CFClock), .In(IOWriteLatchRising), .Out(IOWrite));

assign IOWriteLatch = IOWriteLatchRising && RawIOWrite;              //This logic ensures that the write latch rises slowly and falls instantly

endmodule